CS 5120-0

Brief

The goal of this course is to help you understand the modern VLSI system design and its design technologies, covering the advanced design concepts of VLSI systems and synthesis-ba<x>sed ASIC design flow. We will also discuss the architecture exploration and performance evaluation at the system level, addressing the system integration's key considerations, i.e., the computation, data transfer, memory hierarchy, etc. The emerging high-level design techniques will also be introduced to help you prepare for future design st<x>yles. Finally, case studies will be covered to help you capture the challenges behind the advanced and future VLSI architecture.

Description

Course keywords: 超大型積體電路系統設計, VLSI System Designs, IC Designs, Hardware Accelerators, Domain Specific Accelerators 一、課程說明(Course Descxription) The goal of this course is to help you understand the modern VLSI system design and its design technologies. Intended Students: CS/EE graduate students or undergraduate students in their 3rd or 4th year 二、指定用書(Text Books) Handouts Online materials Selected chapters in textbooks 三、參考書籍(References) TBA 四、教學方式(Teaching Method) Lectures, homework assignments, labs, and projects 五、教學進度(Syllabus) 1 Introduction to modern VLSI system design and its design concepts 2 Synthesis-based ASIC design flow 3 System architecture - Data communications and bandwidth - Memory suybsystem - Architecture exploration and performance evaluation - Emerging high-level design styles 4 Case studies and term projects 六、成績考核(Evaluation) TBA 七、可連結之網頁位址 EEClass website 八、採用下列何項 AI 使用規則 根據本校公布之佈的「大學教育場域AI協作、共學與素養培養指引」，本門課程採取禁止使用，以下為相關的監管機 制 修讀本門課程之學生應注意本門課不得繳交使用生成式人工智慧所產出的作業、報告或個人心得。若經查核發現，教 師、學校或相關單位有權重新針對作業或報告重新評分或不予計分。 修讀本課程之學生於選課時視為同意以上倫理聲明。

Timetable

Scores

Average Percentage 77.46

Std. Deviation 24.08

Remarks

17週課程。上機教室：資電323。欲加簽者務必填寫表單：https://reurl.cc/Nyx4Mp

Restrictions

Compulsory

Elective

Cross Discipline

First Specialization

Second Specialization