Holiday
DELTA台達104 M7M8R5R6
This course is about the principles of digital logic and its implementation in electronic circuits and systems. We will start from the basic logic design concepts and proceed to apply them in building interesting and practical digital systems. Systematic hierarchical design using elementary building blocks will be emphasized. Boolean algebra, arithmetic circuit design, and finite state machine design will be covered. Basic desc<x>ription of digital logic at Register Transfer Level (RTL) will be introduced for digital system development through the Verilog hardware desc<x>ription language.
Course keywords: logic gates, flip-flops, combinational logic, Boolean algebra, sequential logic, finite state machines 一、課程說明 This course helps the students to understand the basic theory of digital logic design and the implementation of logic circuit. In the beginning, the advantages of digital logic and data representation in binary will be discussed. Combinational logic simplification using Boolean algebra and K-maps will be introduced. We will cover the design and usage of combinational building blocks like decoders, encoders, multiplexers, and adders. Then, basic storage elements like latches and various types of flip-flops will be described before diving into the design and analysis of more general sequential circuits. We will study the design of different types of registers and counters, and the design of memory. At the end, we will discuss how to design a digital system systematically as a combination of a datapath and a control unit. Verilog for describing logic circuits will introduced throughout the course. 二、指定用書 Digital Design (6th edition), by M.M. Mano and M.D. Ciletti, Pearson International Edition. 四、教學方式 Lecture 五、教學進度 1. Introductory Digital Design Concepts 2. Boolean Algebra and Logic Gates 3. Gate-Level Minimization 4. Combinational Logic 5. Synchronous Sequential Logic 6. Registers and Counters 7. Memory 8. Digital System Design 六、成績考核 Homeworks 26%; Exam: 74% (2x27%+20%) 七、講義位址 https://eelcass.nthu.edu.tw/
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Average Percentage 67.91
Std. Deviation 16.41
平均百分制 71.55
標準差 17.53
平均百分制 71.32
標準差 18.4
平均百分制 72.1
標準差 15.01
平均百分制 74.11
標準差 16.55
平均百分制 78.78
標準差 15.77
平均GPA 2.99
標準差 1.2
平均百分制 72.3
標準差 18.09
本課程上150分鐘,其餘時間由教授視情況彈性運用。
資工系大學部1年級,電機系大學部1年級,電資院學士班大學部1年級優先,第3次選課起開放全校修習
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